Implementation of 128, 192 & 256 bits Advanced Encryption Standard on Reconfigurable Logic

Monika Gupta; Swapnil Mahto; Ambresh Patel

doi:https://doi.org/10.14445/22315381/IJETT-V50P251

Research Article | Open Access | Download PDF

Volume 50 | Number 3 | Year 2017 | Article Id. IJETT-V50P251 | DOI : https://doi.org/10.14445/22315381/IJETT-V50P251

Implementation of 128, 192 & 256 bits Advanced Encryption Standard on Reconfigurable Logic

Monika Gupta, Swapnil Mahto, Ambresh Patel

Citation :

Monika Gupta, Swapnil Mahto, Ambresh Patel, "Implementation of 128, 192 & 256 bits Advanced Encryption Standard on Reconfigurable Logic," International Journal of Engineering Trends and Technology (IJETT), vol. 50, no. 3, pp. 305-309, 2017. Crossref, https://doi.org/10.14445/22315381/IJETT-V50P251

Abstract

Advanced encryption standard is adopted by NIST to replace data encryption standard, which was affected by several attacks. In this paper implementation of all three modes namely 128, 192 and 256 of advanced encryption standard is discussed for reconfigurable logic. All these modes are implemented using four design architectures namely: 2 stage sequential, 3 stage sequential , combinational and pipelined.

Keywords

Advanced encryption standard, Sequential, combinational, pipelined, encryption, cryptography.

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