A 1.8GHz Differential Low Noise Amplifier for Wireless Receivers

S.Karpagam; Dr.P.Sampath

doi:https://doi.org/10.14445/22315381/IJETT-V4I4P211

Research Article | Open Access | Download PDF

Volume 4 | Issue 4 | Year 2013 | Article Id. IJETT-V4I4P211 | DOI : https://doi.org/10.14445/22315381/IJETT-V4I4P211

A 1.8GHz Differential Low Noise Amplifier for Wireless Receivers

S.Karpagam , Dr.P.Sampath

Citation :

S.Karpagam , Dr.P.Sampath, "A 1.8GHz Differential Low Noise Amplifier for Wireless Receivers," International Journal of Engineering Trends and Technology (IJETT), vol. 4, no. 4, pp. 558-561, 2013. Crossref, https://doi.org/10.14445/22315381/IJETT-V4I4P211

Abstract

In this paper the Differential Low Noise Amplifier (DLNA) operating with a center frequency of 1.748GHz is designed using 0.35?m CMOS technology. The Differential Low Noise Amplifier provides a Gain of 25.5dB with a noise figure of 1.3 . The DLNA is designe d using inductive source degeneration architecture.

Keywords

DLNA, CMOS, Gain, Noise figure.

References

[1 ] D. Shaeffer, T. Lee. ?A 1.5 V, 1.5 GHz CMOS low noise amplifier, IEEE Journal of Solid State Circuits, Vol. 32 , May 1997 . .
[2] T. Melly, A. - S. Porret, C. C. Enz, and M. Kayal, “A 1.3 V low - power 430 MHz front - end using a standard digital CMOS process,” in Custom IC Conf. , Santa Clara, CA, 1998, pp. 503 – 506
[3 ] A. Abidi and J. C. Leete, “De - embedding the noise figure of differential amplifiers,” IEEE J. Solid - State Circuits , vol. 34, pp. 882 – 885, June 1999.
[4 ] W. Jin, P.C.H. Chan and C. Hai, "1.5 - V 1.8 - GHz SOI Low Noise Amplifier for PCS Receivers," IEEE international SOI Conference, Proceedings, pp. 16 - 17, Nov.1999 .
[5 ] T.K. Nguyen and S. G. Lee, “A 5.2GHz, 1.7dB NF low loise amplifier for wireless LAN based on 0.18?m CMOS technology”, International Conference on Microwave and Millimeter Wave Technology , pp. 251 - 254, 2002.
[6] D. J. Cassan and J. R. Long, “A 1 - V transformerfeedback low - noise amplifier for 5 - GHz wireless LAN in 0.18um CMOS”, Journal of Solid State Circuits , vol. 38, no. 3, 2003.
[7] H. Satou, H et al., “5.3GHz 1.6dB NF CMOS lownoise amplifier using 0.11um technology”, Radio Frequency Integrated Circuits Symposium , pp.109 - 112, 2004.
[8] Yi - Jan Emery Chen, Senior Member, IEEE, and Yao - I. Huang “Development of Integrated Broad - Band CMOS Low - Noise Ampli fiers,” IEEE Transactions on circuits and systems regular papers, vol. 54, no. 10, October 2007 .
[9] Ram Singh Rana, Zhang Lian g , Hari Krishna Garg , “Sub - mA single ended CMOS low noise amplifier with 2.41 dB noise Figure”, Analog Integrated C ircuit s Signal Processing Nov 2006 .
[10] R. Montemayor and B. Razavi, “A self - calibrating 900 - MHz CMOS image reject receiver,” in Proc. 2000 Eur. Solid - State Circuits Conf., pp.292 – 295 .
[11] Mayank Chakraverty, Gargi Mishra “Performance Analysis of CMOS Single Ended Low Po wer Low Noise Amplifier, ” International Journal of control and Automation, vol.3, no.2 june 2010.