Implementation of High Throughput FFT for Communication

Leenu Mathew Thomas; R.Ramya

doi:https://doi.org/10.14445/22315381/IJETT-V14P252

Research Article | Open Access | Download PDF

Volume 14 | Number 2 | Year 2014 | Article Id. IJETT-V14P252 | DOI : https://doi.org/10.14445/22315381/IJETT-V14P252

Implementation of High Throughput FFT for Communication

Leenu Mathew Thomas , R.Ramya

Citation :

Leenu Mathew Thomas , R.Ramya, "Implementation of High Throughput FFT for Communication," International Journal of Engineering Trends and Technology (IJETT), vol. 14, no. 2, pp. 267-270, 2014. Crossref, https://doi.org/10.14445/22315381/IJETT-V14P252

Abstract

Most of the wireless standards utilize OFDM technique to enhance the transmission rate which is the vital requirement that is to be met today. The increases in the throughput of FFT block in OFDM system which in turn improves the transmission rate of the system. This paper presents high throughput FFT processor based on Multi-path delay feedback architecture for OFDM systems. Mixed Radix-2/22/23/24 DIF FFT algorithm is used. A comparison is done for different pipeline architecture such as MDF, MDC and SDF using the same algorithm with respect to throughput. The design is fully coded in VHDL, simulated in Xilinx ISE 13.2 and is implemented on Virtex-5 FPGA.

Keywords

OFDM, FFT, FPGA.

References

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